Tilera Out-Competes Intel for Servers

Certainly Intel has a larger presence in servers than the upstart, Tilera, but Tilera has a better product due to sample next month

  • in performance/W, and
  • performance/$

Their new product has 36 ARM cores and two nifty DDR3 memory controllers giving a lot of throughput for very little power consumption. They can match a Sandy Bridge 8 core chip at 2.8gHz with 36 ARMed cores at 1.2gHz. Their next product up the pipe will give 2.5X as much performance for about the same power consumption. These chips will be very useful for folks who have maxed out space or power in the server room or for folks who just want the most power they can pack into a given space or budget.

see Tilera throws gauntlet at Intel’s feet

Customers are already lining up for the chips.

UPDATE There’s a more in-depth article on this subject at Thinq.

Tilera feels they have a solution that scales better than Intel or AMD’s ring-interconnection of cores. They have 100 and 200 cores on the roadmap.

About Robert Pogson

I am a retired teacher in Canada. I taught in the subject areas where I have worked for almost forty years: maths, physics, chemistry and computers. I love hunting, fishing, picking berries and mushrooms, too.
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11 Responses to Tilera Out-Competes Intel for Servers

  1. oldman says:

    Not if the company continues to limit itself to producing dedicated processor boards for specialized systems. And to judge form the marketing literature their focus isn’t on general computing.

  2. On the client. On the server this chip could do lots.

  3. oldman says:

    Actually this looks like a verty interesting chip. the problem is as has been noted the lack of a system to run on. If the HPC folks on our campus on our campus are focused on running rocks clusters on commodity x86 hardware from the likes of Dell.

    This having been said Tilera’s plug in development cards do offer an opportunity to some with the software chops to do the developent. I could see someone building a nifty network appliance out of one of these.

    Unfortunately Pog, As far as desktop use is concerned, this kind of hardware is Way too esoteric.

  4. oiaohm says:

    Robert Pogson R&D. Tilera chips are great for I need to build a new Linux from source now.

    cache coherency problems are mostly solved by using a NUMA kernel. 36 cores 36 indpendant tasks.

    Also I want to see what a Tilera + a serious video card can do with blender and other 3d rendering software.

    Tilera does have one known downside/upside. Every cpu instruction takes 8 bytes even the nop.

    Tile-Gx chips are their own instruction set. Not arm or mips. Even better Tilera does not run windows. Only supported OS is Linux for inside the Tilera chips.

    http://en.wikipedia.org/wiki/VLIW type instruction set on Tilera.

    Arm and Mips are both RISC architectures but they are not VLIW.

    To be correct VLIW helps with coherency. When compiler makes binary it marks down what statements can be done coherent with VLIW. Yes Tilera chips are designed to scale at the assembly level. That x86 arm and mips are not.

    So yes cache coherency problems and a lot of other problems you have to try to program around with x86 arm and mips you don’t have to with the Tilera chips the instruction set and hardware takes care of it.

    Most cases Tilera chips do more per clock cycle than an x86 as well. Also tilera chips don’t suffer from major speed variations like x86 do.

    Tilera hardware contains something sneaky. Each cpu has a cache each of those caches can talk to each other directly without sending back to the memory controllers. So internally sets of cpu’s inside a Tilera can have 100 percent synced cache with quite a low overhead. Not spreading tasks from 1 corner to the other is a good idea in a Tilera but to break tasks down into a related groups and run them in near by cores does run better. L1 to L1 caches can talk to each other in a Tilera cache.

    I am looking forward to some of the latter chips in the Gx series particular ones that will contain this. “Three StreamIOâ„¢ ports, each providing up to 20Gbps throughput for Tile-to-Tile or FPGA interconnect”

    Yes what we are seeing now is just the tip of iceberg.

  5. ray says:

    Perhaps, but differences archetecture could mean each clock cycle would do less, or more.

  6. DDR3 at that. There are still programming issues/cache coherency problems but I can see this hardware will be very useful for large numbers of simple web-sites/services or large programming problems that fit into a rectangular array.

    I used to work on problems like that in the 1970s, calculating electric fields. To a good approximation, one can map a two-dimensional problem to this architecture perfectly and the algorithm involved averaging four values from neighbouring points and multiplying by some factor and replacing the local value. We took milliseconds per point in an array with thousands of points and repeated hundreds of times to get the answer. A gadget like this could solve the problem in milliseconds making it useful to cut-and-paste CAD. There is a large class of problems that can benefit from this architecture, anything 2-D which can be represented reasonably well by differential equations. That's a lot… 😎 Expect better weather forecasts sooner.

  7. oiaohm says:

    I always hate looking at Tilera chips Love them but its finding machines with them.

    There new product is possible to scale to 100 cores in a single chip. 100 core versions contain 4 memory controllers.

  8. They are talking more than gFLOP/s.

    8cores X 2.8 gHz = 24 core-gHz. ~ 48 gFLOP/s.

    36cores X 1.5gHz = 48 core-gHz. ~ 48 gFLOP/s.

    Perhaps a core-gHz of Intel does 2X as much as a core-gHz of ARM. It depends.

    At 500 MHz a previous 36-core model gave 54gFLOPS (32 bit). This thing has a much more serious memory interface.

  9. Ray says:

    So what is the FLOPS/s then?

  10. Quoting TFA, “Bishara says that the Tile-Gx 3036 “will be competitive with the eight-core Sandy Bridge chip,” and adds that Tilera “needs to be competitive with Intel on price so that means we need to at least match them””

    Perhaps they will match the price and performance, beating Intel only on power.

    They will make a profit that way since ARMed cores use many fewer transistors/silicon. Intel prices their processors around $1000 or more to start on a new release.

    see the current price list.

    The Xeon E5 is not on it but is due in 2012. Intel must be sampling now since TFA says they ran tests on that chip.

  11. ray says:

    Can I see the FLOPS per cost for both systems?

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